LteRlcUmRxEntityD2D

simple module

D2D-capable LTE (TS 36.322) RLC UM receiving entity: LteRlcUmRxEntity plus the D2D_MULTI single-PDU reordering window, the post-mode-switch reassembly resynchronisation, and the D2D branch of the throughput/delay statistics.

Inheritance diagram

The following diagram shows inheritance relationships for this type. Unresolved types are missing from the diagram.

Extends

Name	Type	Description
LteRlcUmRxEntity	simple module	LTE (TS 36.322) receiving side of the Unacknowledged Mode (UM) of the RLC layer: FI-walk reassembly across concatenated PDUs with a PDU-SN reordering window and a t-Reordering timer. Shares the common RlcUmRxEntityBase shell (MAC-mux plumbing, D2D hooks, UL burst-throughput accounting) with the NR profile NrRlcUmRxEntity. Bound by default inside the LteRlcUmEntity compound. Its throughput/delay statistics are emitted on the sibling rlcMux module (see RlcMux).

Parameters

Name	Type	Default value	Description
macModule	string	"^.^.mac"	Set by the enclosing RlcUmEntityBase compound (per leg)
rlcMuxModule	string	"^.^.rlcMux"	This bearer's leg mux; set by the RlcUmEntityBase compound
timeout	double	1s	Timeout for RX Buffer
rxWindowSize	int	16	PDU reorder window

Properties

Name	Value	Description
dynamic	true
display	i=block/layer
class	LteRlcUmRxEntityD2D

Gates

Name	Direction	Size	Description
in	input		PDUs from MAC, via the RlcMux
out	output		Reassembled SDUs to the PDCP layer (direct per-DRB connection, not via a mux)

Signals

Name	Type	Unit	Description
rlcDelayDl
rlcThroughputDl
rlcDelayUl
rlcThroughputUl
rlcPduDelayDl
rlcPduThroughputDl
rlcPduDelayUl
rlcPduThroughputUl
rlcDelayD2D
rlcThroughputD2D
rlcPduDelayD2D
rlcPduThroughputD2D

Statistics

Name	Title	Source	Record	Unit
rlcDelayDl	Delay at the rlc layer DL	rlcDelayDl	mean	s
rlcThroughputDl	Throughput at the rlc layer DL	rlcThroughputDl	simu5g_rateavg	Bps
rlcDelayUl	Delay at the rlc layer UL	rlcDelayUl	mean	s
rlcThroughputUl	Throughput at the rlc layer UL	rlcThroughputUl	simu5g_rateavg	Bps
rlcPduDelayDl	PDU delay at the rlc layer DL	rlcPduDelayDl	mean	s
rlcPduThroughputDl	PDU throughput at the rlc layer DL	rlcPduThroughputDl	simu5g_rateavg	Bps
rlcPduDelayUl	PDU delay at the rlc layer UL	rlcPduDelayUl	mean	s
rlcPduThroughputUl	PDU throughput at the rlc layer UL	rlcPduThroughputUl	simu5g_rateavg	Bps
rlcDelayD2D	Delay at the rlc layer D2D	rlcDelayD2D	mean	s
rlcThroughputD2D	Throughput at the rlc layer D2D	rlcThroughputD2D	simu5g_rateavg	Bps
rlcPduDelayD2D	PDU delay at the rlc layer D2D	rlcPduDelayD2D	mean	s
rlcPduThroughputD2D	PDU throughput at the rlc layer D2D	rlcPduThroughputD2D	simu5g_rateavg	Bps

Source code

//
// D2D-capable LTE (TS 36.322) RLC UM receiving entity: ~LteRlcUmRxEntity plus the
// D2D_MULTI single-PDU reordering window, the post-mode-switch reassembly
// resynchronisation, and the D2D branch of the throughput/delay statistics.
//
simple LteRlcUmRxEntityD2D extends LteRlcUmRxEntity
{
    parameters:
        @class("LteRlcUmRxEntityD2D");

        //# D2D statistics, emitted only by this D2D profile
        @signal[rlcDelayD2D];
        @statistic[rlcDelayD2D](title="Delay at the rlc layer D2D"; unit="s"; source="rlcDelayD2D"; record=mean);
        @signal[rlcThroughputD2D];
        @statistic[rlcThroughputD2D](title="Throughput at the rlc layer D2D"; unit="Bps"; source="rlcThroughputD2D"; record=simu5g_rateavg);
        @signal[rlcPduDelayD2D];
        @statistic[rlcPduDelayD2D](title="PDU delay at the rlc layer D2D"; unit="s"; source="rlcPduDelayD2D"; record=mean);
        @signal[rlcPduThroughputD2D];
        @statistic[rlcPduThroughputD2D](title="PDU throughput at the rlc layer D2D"; unit="Bps"; source="rlcPduThroughputD2D"; record=simu5g_rateavg);
}

File: src/simu5g/stack/d2d/rlc/LteRlcUmRxEntityD2D.ned